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    <h1>File: /Users/paulross/dev/linux/linux-3.13/arch/x86/include/asm/hardirq.h</h1>
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    <pre><a name="1" /><span class="True">       1:</span> <span class="f">#</span><span class="n">ifndef</span> <a href="cpu.c_macros_noref.html#_X0FTTV9YODZfSEFSRElSUV9IXzA_"><span class="b">_ASM_X86_HARDIRQ_H</span></a>
<a name="2" /><span class="True">       2:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_X0FTTV9YODZfSEFSRElSUV9IXzA_"><span class="b">_ASM_X86_HARDIRQ_H</span></a>
<a name="3" /><span class="True">       3:</span> 
<a name="4" /><span class="True">       4:</span> <span class="f">#</span><span class="n">include</span> <span class="f">&lt;</span><span class="b">linux</span><span class="f">/</span><span class="b">threads</span><span class="f">.</span><span class="b">h</span><span class="f">&gt;</span>
<a name="5" /><span class="True">       5:</span> <span class="f">#</span><span class="n">include</span> <span class="f">&lt;</span><span class="b">linux</span><span class="f">/</span><span class="b">irq</span><span class="f">.</span><span class="b">h</span><span class="f">&gt;</span>
<a name="6" /><span class="True">       6:</span> 
<a name="7" /><span class="True">       7:</span> <span class="m">typedef</span> <span class="m">struct</span> <span class="f">{</span>
<a name="8" /><span class="True">       8:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">__softirq_pending</span><span class="f">;</span>
<a name="9" /><span class="True">       9:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">__nmi_count</span><span class="f">;</span>    <span class="k">/* arch dependent */</span>
<a name="10" /><span class="True">      10:</span> <span class="f">#</span><span class="n">ifdef</span> <a href="cpu.c_macros_ref.html#_Q09ORklHX1g4Nl9MT0NBTF9BUElDXzA_"><span class="b">CONFIG_X86_LOCAL_APIC</span></a>
<a name="11" /><span class="True">      11:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">apic_timer_irqs</span><span class="f">;</span>    <span class="k">/* arch dependent */</span>
<a name="12" /><span class="True">      12:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_spurious_count</span><span class="f">;</span>
<a name="13" /><span class="True">      13:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">icr_read_retry_count</span><span class="f">;</span>
<a name="14" /><span class="True">      14:</span> <span class="f">#</span><span class="n">endif</span>
<a name="15" /><span class="True">      15:</span> <span class="f">#</span><span class="n">ifdef</span> <a href="cpu.c_macros_ref.html#_Q09ORklHX0hBVkVfS1ZNXzA_"><span class="b">CONFIG_HAVE_KVM</span></a>
<a name="16" /><span class="True">      16:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">kvm_posted_intr_ipis</span><span class="f">;</span>
<a name="17" /><span class="True">      17:</span> <span class="f">#</span><span class="n">endif</span>
<a name="18" /><span class="True">      18:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">x86_platform_ipis</span><span class="f">;</span>    <span class="k">/* arch dependent */</span>
<a name="19" /><span class="True">      19:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">apic_perf_irqs</span><span class="f">;</span>
<a name="20" /><span class="True">      20:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">apic_irq_work_irqs</span><span class="f">;</span>
<a name="21" /><span class="True">      21:</span> <span class="f">#</span><span class="n">ifdef</span> <a href="cpu.c_macros_ref.html#_Q09ORklHX1NNUF8w"><span class="b">CONFIG_SMP</span></a>
<a name="22" /><span class="True">      22:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_resched_count</span><span class="f">;</span>
<a name="23" /><span class="True">      23:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_call_count</span><span class="f">;</span>
<a name="24" /><span class="True">      24:</span>     <span class="k">/*</span>
<a name="25" /><span class="True">      25:</span> <span class="k">     * irq_tlb_count is double-counted in irq_call_count, so it must be</span>
<a name="26" /><span class="True">      26:</span> <span class="k">     * subtracted from irq_call_count when displaying irq_call_count</span>
<a name="27" /><span class="True">      27:</span> <span class="k">     */</span>
<a name="28" /><span class="True">      28:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_tlb_count</span><span class="f">;</span>
<a name="29" /><span class="True">      29:</span> <span class="f">#</span><span class="n">endif</span>
<a name="30" /><span class="True">      30:</span> <span class="f">#</span><span class="n">ifdef</span> <a href="cpu.c_macros_ref.html#_Q09ORklHX1g4Nl9USEVSTUFMX1ZFQ1RPUl8w"><span class="b">CONFIG_X86_THERMAL_VECTOR</span></a>
<a name="31" /><span class="True">      31:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_thermal_count</span><span class="f">;</span>
<a name="32" /><span class="True">      32:</span> <span class="f">#</span><span class="n">endif</span>
<a name="33" /><span class="True">      33:</span> <span class="f">#</span><span class="n">ifdef</span> <a href="cpu.c_macros_ref.html#_Q09ORklHX1g4Nl9NQ0VfVEhSRVNIT0xEXzA_"><span class="b">CONFIG_X86_MCE_THRESHOLD</span></a>
<a name="34" /><span class="True">      34:</span>     <span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq_threshold_count</span><span class="f">;</span>
<a name="35" /><span class="True">      35:</span> <span class="f">#</span><span class="n">endif</span>
<a name="36" /><span class="True">      36:</span> <span class="f">}</span> <a href="cpu.c_macros_ref.html#_X19fX2NhY2hlbGluZV9hbGlnbmVkXzA_"><span class="b">____cacheline_aligned</span></a> <span class="b">irq_cpustat_t</span><span class="f">;</span>
<a name="37" /><span class="True">      37:</span> 
<a name="38" /><span class="True">      38:</span> <a href="cpu.c_macros_ref.html#_REVDTEFSRV9QRVJfQ1BVX1NIQVJFRF9BTElHTkVEXzA_"><span class="b">DECLARE_PER_CPU_SHARED_ALIGNED</span></a><span class="f">(</span><span class="b">irq_cpustat_t</span><span class="f">,</span> <span class="b">irq_stat</span><span class="f">)</span><span class="f">;</span>
<a name="39" /><span class="True">      39:</span> 
<a name="40" /><span class="True">      40:</span> <span class="k">/* We can have at most NR_VECTORS irqs routed to a cpu at a time */</span>
<a name="41" /><span class="True">      41:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_TUFYX0hBUkRJUlFTX1BFUl9DUFVfMA__"><span class="b">MAX_HARDIRQS_PER_CPU</span></a> <a href="cpu.c_macros_ref.html#_TlJfVkVDVE9SU18w"><span class="b">NR_VECTORS</span></a>
<a name="42" /><span class="True">      42:</span> 
<a name="43" /><span class="True">      43:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_X19BUkNIX0lSUV9TVEFUXzA_"><span class="b">__ARCH_IRQ_STAT</span></a>
<a name="44" /><span class="True">      44:</span> 
<a name="45" /><span class="True">      45:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_aW5jX2lycV9zdGF0XzA_"><span class="b">inc_irq_stat</span></a><span class="f">(</span><span class="b">member</span><span class="f">)</span>    <a href="cpu.c_macros_ref.html#_dGhpc19jcHVfaW5jXzA_"><span class="b">this_cpu_inc</span></a><span class="f">(</span><span class="b">irq_stat</span><span class="f">.</span><span class="b">member</span><span class="f">)</span>
<a name="46" /><span class="True">      46:</span> 
<a name="47" /><span class="True">      47:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_bG9jYWxfc29mdGlycV9wZW5kaW5nXzA_"><span class="b">local_softirq_pending</span></a><span class="f">(</span><span class="f">)</span>    <a href="cpu.c_macros_ref.html#_dGhpc19jcHVfcmVhZF8w"><span class="b">this_cpu_read</span></a><span class="f">(</span><span class="b">irq_stat</span><span class="f">.</span><span class="b">__softirq_pending</span><span class="f">)</span>
<a name="48" /><span class="True">      48:</span> 
<a name="49" /><span class="True">      49:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_X19BUkNIX1NFVF9TT0ZUSVJRX1BFTkRJTkdfMA__"><span class="b">__ARCH_SET_SOFTIRQ_PENDING</span></a>
<a name="50" /><span class="True">      50:</span> 
<a name="51" /><span class="True">      51:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_c2V0X3NvZnRpcnFfcGVuZGluZ18w"><span class="b">set_softirq_pending</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    \
<a name="52" /><span class="True">      52:</span>         <a href="cpu.c_macros_ref.html#_dGhpc19jcHVfd3JpdGVfMA__"><span class="b">this_cpu_write</span></a><span class="f">(</span><span class="b">irq_stat</span><span class="f">.</span><span class="b">__softirq_pending</span><span class="f">,</span> <span class="f">(</span><span class="b">x</span><span class="f">)</span><span class="f">)</span>
<a name="53" /><span class="True">      53:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_b3Jfc29mdGlycV9wZW5kaW5nXzA_"><span class="b">or_softirq_pending</span></a><span class="f">(</span><span class="b">x</span><span class="f">)</span>    <a href="cpu.c_macros_ref.html#_dGhpc19jcHVfb3JfMA__"><span class="b">this_cpu_or</span></a><span class="f">(</span><span class="b">irq_stat</span><span class="f">.</span><span class="b">__softirq_pending</span><span class="f">,</span> <span class="f">(</span><span class="b">x</span><span class="f">)</span><span class="f">)</span>
<a name="54" /><span class="True">      54:</span> 
<a name="55" /><span class="True">      55:</span> <span class="m">extern</span> <span class="m">void</span> <span class="b">ack_bad_irq</span><span class="f">(</span><span class="m">unsigned</span> <span class="m">int</span> <span class="b">irq</span><span class="f">)</span><span class="f">;</span>
<a name="56" /><span class="True">      56:</span> 
<a name="57" /><span class="True">      57:</span> <span class="m">extern</span> <span class="b">u64</span> <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF9jcHVfMA__"><span class="b">arch_irq_stat_cpu</span></a><span class="f">(</span><span class="m">unsigned</span> <span class="m">int</span> <span class="b">cpu</span><span class="f">)</span><span class="f">;</span>
<a name="58" /><span class="True">      58:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF9jcHVfMA__"><span class="b">arch_irq_stat_cpu</span></a>    <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF9jcHVfMA__"><span class="b">arch_irq_stat_cpu</span></a>
<a name="59" /><span class="True">      59:</span> 
<a name="60" /><span class="True">      60:</span> <span class="m">extern</span> <span class="b">u64</span> <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF8w"><span class="b">arch_irq_stat</span></a><span class="f">(</span><span class="m">void</span><span class="f">)</span><span class="f">;</span>
<a name="61" /><span class="True">      61:</span> <span class="f">#</span><span class="n">define</span> <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF8w"><span class="b">arch_irq_stat</span></a>        <a href="cpu.c_macros_noref.html#_YXJjaF9pcnFfc3RhdF8w"><span class="b">arch_irq_stat</span></a>
<a name="62" /><span class="True">      62:</span> 
<a name="63" /><span class="True">      63:</span> <span class="f">#</span><span class="n">endif</span> <span class="k">/* _ASM_X86_HARDIRQ_H */</span>
<a name="64" /><span class="True">      64:</span> </pre>
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